REDEFINE : A Brief Technical Introduction

The REDEFINE™ SoC Platform

REDEFINE is a multi-accelerator and many-core System-on-Chip platform for compute-intensive applications on the Edge and at the Core. High performance computing applications from the domain of AI and Machine Learning, real-time reactive control applications for avionics and autonomous vehicles are candidates for acceleration on REDEFINE. Through run-time specialization, REDEFINE can be configured into dynamic virtual clusters of RISC-V ISA based compute cores. The architecture offers seamless scalability from 16-cores to 4K-cores without any software changes. Multiple, and diverse accelerators are realized on REDEFINE SoC as software-defined domain-specific hardware.

REDEFINE based solutions offer a unique combination of high performance and flexibility not available from other technologies provided by global players. REDEFINE SoCs accelerate entire classes of compute-intensive applications, at significantly low power. REDEFINE delivers ASIC-like high performance at an affordable NRE cost for a wide range of compute-intensive applications, accelerates data-parallel SIMD algorithms, task-parallel MIMD algorithms, streaming algorithms, and asynchronous event-driven algorithms simultaneously.

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Go to more detailed technical information videos on the REDEFINE architecture, execution, and compilation model.

Go to a video demonstration of multiple concurrent kernel execution on REDEFINE.