REDEFINE XFloat: MM-RSXM-F16 – High-performance parallel floating point arithmetic engine

The MM-RSXM-F16 is an accelerator engine for floating-pint intensive applications based upon a 16 node REDEFINE parallel processing platform.  The MM-RSXM-F16 provides high-performance double-precision floating-point computation with special support for dynamically reconfigurable vector and matrix operations, delivering a peak compute throughput of 8 GFlops (double-precision).  Supported clock speeds include 50-200 MHz on FPGA, up to 750 MHz on 65nm ASIC, and up to 1 GHz on 40nm ASIC.

With a gate count of 3.6 million, on-chip memory of 528 KB, and a silicon area of 13.1 mm^2 at 65nm and 9.7 mm^2 at 40nm, the MM-RSXM-F16 is an ideal solution for high-performance floating-point computation in on-board computers and other power and space constrained SoCs.

The attached data sheet provides more details.