REDEFINE - Reconfigurable Silicon Core
The path-breaking runtime reconfigurable silicon core technology REDEFINE (TM) – the flagship technology from Morphing Machines conceived and developed in India – has attracted high interest around the world recently. REDEFINE technology provides an architecture and a platform for polymorphic ASICs and SoCs that implement high-performance runtime reconfigurable application domain specific massively parallel processors and heterogeneous many-core processors.
The REDEFINE Meta Compiler Framework enables development of new applications and re-targeting of existing application source code to a REDEFINE application core through data-flow driven concurrency analysis and generation of the runtime hardware reconfiguration meta-data to drive the REDEFINE fabric of compute resources and the REDEFINE XNOC network-on-chip.
REDEFINE based solutions deliver a unique combination of high performance and flexibility not available from other technologies offered by global players. Unlike a dedicated ASIC, a single REDEFINE core accelerates an entire class of related algorithms and applications, while optimizing space and power usage. REDEFINE enables ASIC-like high performance at an affordable NRE cost for a much wider range of compute-intensive applications than has ever been possible before.
Watch a brief introduction to REDEFINE technology in a presentation video.
More details of REDEFINE technology and licensing the REDEFINE IP are available on request.